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Doping Engineering for Front-End Processing

Doping Engineering for Front-End Processing

Doping Engineering for Front-End Processing

Volume 1070:
B. J. Pawlak , NXP Semiconductors, Belgium
M. L. Pelaz , Universidad de Valladolid, Spain
M. Law , University of Florida
K. Surugo , Toshiba Corporation, Japan
October 2008
1070
Hardback
9781605110400

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Hardback
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    Materials scientists, silicon technologists and TCAD researchers come together in this book to share experimental results and physical models, discuss achievements and challenges, and identify key issues for future research in this field. The volume focuses on many aspects related to doping of semiconductors (Si, SiGe and Ge) for device fabrication, and explores areas for single-gate as well as multi-gate devices with planar and vertical architectures. Surface properties, coverage, bonding saturation and passivation, and annealing ambient are also discussed.

    Product details

    October 2008
    Hardback
    9781605110400
    319 pages
    235 × 160 × 20 mm
    0.5kg
    Available

    Table of Contents

    • Preface
    • Part I. Ultra Shallow Junctions I
    • Part II. Shallow Junction Contacting
    • Part III. Poster Session
    • Part IV. Ultra Shallow Junctions II
    • Part V. Solid Phase Epitaxial Regrowth
    • Part VI. Modeling and Simulation
    • Author index
    • Subject index.
      Editors
    • B. J. Pawlak , NXP Semiconductors, Belgium
    • M. L. Pelaz , Universidad de Valladolid, Spain
    • M. Law , University of Florida
    • K. Surugo , Toshiba Corporation, Japan